Tools and Methodology Development for Pulsed Laser Fault Injection in Sram-based Fpgas
نویسندگان
چکیده
This paper presents the development of a set of tools and the associated methodology for performing pulsed laser fault injection experiments in SRAM-based FPGAs. The new platform allows reliable evaluation of the impact of SEU and MBU in the configuration memory.
منابع مشابه
Single Event Upset Mitigation Techniques for SRAM-based FPGAs
This paper discusses high level techniques for designing fault tolerant systems in SRAM-based FPGAs, without modification in the FPGA architecture. TMR has been successfully applied in FPGAs to mitigate transient faults, which are likely to occur in space applications. However, TMR comes with high area and power dissipation penalties. The new technique proposed in this paper was specifically de...
متن کاملA new fault injection approach to study the impact of bitflips in the configuration of SRAM-based FPGAs
A new method for injecting faults in the configuration bits of SRAM-based FPGAs is proposed. The main advantages over previous methods are its ability to simultaneously inject several faults or bit-flips in the FPGA by “pipelining” the fault injection process. The design to be tested is divided into modules. The first step in the fault injection technique would be inserting one fault in each of...
متن کاملAcceleration of FPGA Fault Injection Through Multi-Bit Testing
SRAM-based FPGA devices are an attractive option for data processing on space-based platforms, due to high computational capabilities and a lower power envelope than traditional processing devices. These devices present unique fault-testing challenges as single-event effects can trigger changes in functionality by changing the configuration memory of the device. With each new generation, FPGA c...
متن کاملDesign Methodologies for Tolerating Cell and Interconnect Faults in FPGAs
The very high levels of integration and submicron device sizes used in current and emerging VLSI technologies for FPGAs lead to higher occurrences of defects and operational faults. Thus, there is a critical need for fault tolerance and reconfiguration techniques for FPGAs to increase chip yields (with factory reconfiguration) and/or system reliability (with field reconfiguration). We first pro...
متن کاملMethodologies for Tolerating Cell and Interconnect Faults in FPGAs
The very high levels of integration and submicron device sizes used in current and emerging VLSI technologies for FPGAs lead to higher occurrences of defects and operational faults. Thus, there is a critical need for fault tolerance and reconfiguration techniques for FPGAs to increase chip yields (with factory reconfiguration) and/or system reliability (with field reconfiguration). We first pro...
متن کامل